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PLCcore-5484 – A flexibly PLC core module solution

PLCcore-5484 – A flexibly PLC core module solution

The SYS TEC PLC core module PLCcore-5484 is an ideal basis for customized solutions. Based on the Single Board Computer ECUcore-5484, it allows for an integration of compact, Linux-based and extremely high-capacity Hard-PLC into own applications at low effort. With all necessary components already being preinstalled, no additional license costs occur.

  Main Features of PLCcore-5484
PLCcore Firmware IEC61131-3 runtime kernel pre-installed
Shared process image
CiA302/314 compliant CANopen manager
Customizable I/O driver
Program download via Ethernet or CANopen
Controller Freescale MCF5484 MCU with Coldfire V4e core
System Clock 200 MHz and 300+ MIPS
RAM
(default/optional)
64/128MB DDR-SDRAM
FLASH
(default/optional)
16/32MB NOR
EEPROM 32 KiB
FPGA Options Lattice LFE2-6 or Lattice LFE2-20
MACH XO 640 (CPLD)
HMI Options driver for dot-matrix display and 4x4 keypad
On-board Peripherals DMA, MMU, hardware watchdog, temperature sensor, RTC
Interfaces  
Fast Ethernet 2x 10/100Mbps, 1x on-board PHY
CAN 2
UART 4
SPI/I2C 1/1
Operating Conditions Temperature: -40°C…+85°C
Humidity: 10-90% RH, non-condensing
Power Supply 3.3V +/- 5%, 1.5A max.
Dimensions/
Weight
70 x 41.5 x 7.8 (L x W x H in mm),
20g
Board-to-board connector 2x 60 pin header socket, 0.5 mm pitch
Available on board-to-board connector CAN, I˛C, SPI, FlexBus, GPIO, 24 digital input lines, 22 digital output lines, 1 high-speed counter (pulse/dir or A/B), 1 PWM/PTO output (pulse/dir), Ethernet
RoHS compliant yes
Operating System Linux with X server and QT framework
Integrated Development
Environment (IDE)
Pre-integrated Eclipse-based IDE with GNU C/C++ tool chain, source- and assembly-level debugger
IEC 61131-3 IDE (OpenPCS) with SYS TEC vendor extensions
Complementary Middleware CANopen® Protocol Stack Source Code
Ethernet POWERLINK Protocol Stack Source Code


PLC core module
Datasheet

PLCcore-5484





This page last updated: 17. November, 2011
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